Synopsys Expands Collaboration with ARM to Deliver Artisan Physical Libraries and POP IP Support for IC Compiler II
Poster: SySAdmin
Posted on September 8, 2016 at 12:14:01 PM
Synopsys Expands Collaboration with ARM to Deliver Artisan Physical Libraries and POP IP Support for IC Compiler II
Solution Enables Maximum Benefits of Leading Process Technologies with High QoR
MOUNTAIN VIEW, Calif., Sept. 8, 2016 /PRNewswire/ --
Highlights:
-- ARM and Synopsys collaborate to deliver ARM(®) Artisan(®) standard
cells and memory libraries and ARM POP(TM) IP support for the Synopsys
IC Compiler(TM) II place-and-route system
-- Collaboration enables leading-edge partners to achieve optimal
power-performance-area results for popular ARM processors at 28-nm and
16-/14-nm FinFET technologies
-- Advancements on optimized implementation of ARM's latest premium CPU,
the ARM Cortex(®)-A73, to be presented at Synopsys' IC Compiler II
Technology Symposium, September 14 at the Santa Clara Marriott hotel
Synopsys, Inc. (Nasdaq: SNPS) today announced it has collaborated with ARM to enable the delivery of Artisan standard cells, memories, ARM POP IP and core-hardening acceleration technology, compatible with Synopsys' IC Compiler II place-and-route system. Introduced in 2014, IC Compiler II is the industry's leading solution for advanced physical design at all process nodes, delivering high quality of results (QoR) with the fastest design throughput. ARM and Synopsys worked together closely to ensure that IC Compiler II fully utilizes the power, performance and area benefits of Artisan Physical IP and ARM POP IP in ARM processor implementations, including the latest premium ARM Cortex-A73 CPU on 16-/14-nanometer (nm) FinFET technologies. With work ongoing on the emerging 10nm and 7nm process nodes, the collaboration will enable adopters of ARM's mobile IP using IC Compiler II to continue to maximize performance and energy-efficiency while accelerating the delivery of innovative products to market.
"Leading-edge processors continue to push the envelope on speed and energy-efficiency, utilizing significant advancements in silicon technology," said Ron Moore, vice president of marketing for the physical design group at ARM. "In anticipation of this growing complexity, ARM has been working closely with Synopsys to put in place optimally-tuned standard cells, logic, and memory instances for IC Compiler II. In our testing, the combined solution delivered the full benefits of FinFET process technologies while demonstrating impressive throughput. We are continuing to collaborate with Synopsys on 10nm and 7nm design enablement."
IC Compiler II features many innovative technologies that make it suitable for high-performance, energy-efficient ARM processor implementations, resulting in an envelope of milliwatts/megahertz (mW/MHz) options for mobile applications. Fast library exploration, efficient early-data handling and automatic data-flow-driven floorplan prototyping make it possible to resolve primary design decisions with high accuracy. Novel optimization technologies, including the industry's first analytical physical synthesis engine, layer-aware promotion and physically-aware clock gate insertion, guide designers decisively toward frequency targets while keeping total-negative-slack (TNS) impact low. Fast parametric on-chip-variation analysis (POCV), global-route-based net estimation and signoff-accurate delay calculation ensure optimal correlation, less margining, and fewer engineering change orders (ECOs). Finally, advanced logic restructuring, active total-power optimization and global concurrent clock-and-data optimization technologies aggressively reduce area and power while ensuring timing closure.
"Since its market debut, IC Compiler II has seen tremendous customer response and has already enabled thousands of implementations across a multitude of advanced silicon applications," said Bijan Kiani, vice president of marketing for the Design Group at Synopsys. "Our ongoing collaboration with ARM on Artisan physical libraries and ARM POP IP, together with ARM processors, ensures our mutual customers can get the best performance and yield out of their foundry process while improving designer productivity and getting to market faster."
Availability
Artisan Physical IP and ARM POP IP support for IC Compiler II on leading FinFET foundry process nodes is now available. For more information, contact your ARM partner manager.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software(TM) partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15(th) largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at http://www.synopsys.com.
Editorial Contact:
Sabina Burns
Synopsys, Inc.
650-584-7137
sabina.burns@synopsys.com
SOURCE Synopsys, Inc.
Synopsys, Inc.
Web Site: http://www.synopsys.com
Solution Enables Maximum Benefits of Leading Process Technologies with High QoR
MOUNTAIN VIEW, Calif., Sept. 8, 2016 /PRNewswire/ --
Highlights:
-- ARM and Synopsys collaborate to deliver ARM(®) Artisan(®) standard
cells and memory libraries and ARM POP(TM) IP support for the Synopsys
IC Compiler(TM) II place-and-route system
-- Collaboration enables leading-edge partners to achieve optimal
power-performance-area results for popular ARM processors at 28-nm and
16-/14-nm FinFET technologies
-- Advancements on optimized implementation of ARM's latest premium CPU,
the ARM Cortex(®)-A73, to be presented at Synopsys' IC Compiler II
Technology Symposium, September 14 at the Santa Clara Marriott hotel
Synopsys, Inc. (Nasdaq: SNPS) today announced it has collaborated with ARM to enable the delivery of Artisan standard cells, memories, ARM POP IP and core-hardening acceleration technology, compatible with Synopsys' IC Compiler II place-and-route system. Introduced in 2014, IC Compiler II is the industry's leading solution for advanced physical design at all process nodes, delivering high quality of results (QoR) with the fastest design throughput. ARM and Synopsys worked together closely to ensure that IC Compiler II fully utilizes the power, performance and area benefits of Artisan Physical IP and ARM POP IP in ARM processor implementations, including the latest premium ARM Cortex-A73 CPU on 16-/14-nanometer (nm) FinFET technologies. With work ongoing on the emerging 10nm and 7nm process nodes, the collaboration will enable adopters of ARM's mobile IP using IC Compiler II to continue to maximize performance and energy-efficiency while accelerating the delivery of innovative products to market.
"Leading-edge processors continue to push the envelope on speed and energy-efficiency, utilizing significant advancements in silicon technology," said Ron Moore, vice president of marketing for the physical design group at ARM. "In anticipation of this growing complexity, ARM has been working closely with Synopsys to put in place optimally-tuned standard cells, logic, and memory instances for IC Compiler II. In our testing, the combined solution delivered the full benefits of FinFET process technologies while demonstrating impressive throughput. We are continuing to collaborate with Synopsys on 10nm and 7nm design enablement."
IC Compiler II features many innovative technologies that make it suitable for high-performance, energy-efficient ARM processor implementations, resulting in an envelope of milliwatts/megahertz (mW/MHz) options for mobile applications. Fast library exploration, efficient early-data handling and automatic data-flow-driven floorplan prototyping make it possible to resolve primary design decisions with high accuracy. Novel optimization technologies, including the industry's first analytical physical synthesis engine, layer-aware promotion and physically-aware clock gate insertion, guide designers decisively toward frequency targets while keeping total-negative-slack (TNS) impact low. Fast parametric on-chip-variation analysis (POCV), global-route-based net estimation and signoff-accurate delay calculation ensure optimal correlation, less margining, and fewer engineering change orders (ECOs). Finally, advanced logic restructuring, active total-power optimization and global concurrent clock-and-data optimization technologies aggressively reduce area and power while ensuring timing closure.
"Since its market debut, IC Compiler II has seen tremendous customer response and has already enabled thousands of implementations across a multitude of advanced silicon applications," said Bijan Kiani, vice president of marketing for the Design Group at Synopsys. "Our ongoing collaboration with ARM on Artisan physical libraries and ARM POP IP, together with ARM processors, ensures our mutual customers can get the best performance and yield out of their foundry process while improving designer productivity and getting to market faster."
Availability
Artisan Physical IP and ARM POP IP support for IC Compiler II on leading FinFET foundry process nodes is now available. For more information, contact your ARM partner manager.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software(TM) partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15(th) largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at http://www.synopsys.com.
Editorial Contact:
Sabina Burns
Synopsys, Inc.
650-584-7137
sabina.burns@synopsys.com
SOURCE Synopsys, Inc.
Synopsys, Inc.
Web Site: http://www.synopsys.com