Xilinx Unveils Revolutionary Adaptable Computing Product Category

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March 19, 2018
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style="-moz-hyphens:none;-webkit-hyphens:none;Margin:0;Margin-bottom:10px;color:#fff;font-family:Montserrat,Arial,sans-serif;font-size:18px;font-weight:400;hyphens:none;line-height:22px;margin:0;margin-bottom:10px;padding:0;text-align:center;text-transform:uppercase;word-break:none;word-wrap:normal">News From Xilinx, Inc.</h4><h5 class="text-center" style="-moz-hyphens:none;-webkit-hyphens:none;Margin:0;Margin-bottom:10px;color:#fff;font-family:Montserrat,Arial,sans-serif;font-size:14px;font-weight:500;hyphens:none;line-height:18px;margin:0;margin-bottom:0;padding:0;text-align:center;word-break:none;word-wrap:normal">Transmitted by PR Newswire for Journalists on <span class="prevent-break" style="display:inline-block">March 19, 2018 05:01 AM EST </span></h5></th><th class="expander" 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style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left">                <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word">&#xA0;</td></tr></tbody></table>               <h1 style="Margin:0;Margin-bottom:10px;color:#4D4E53;font-family:Montserrat,Arial,sans-serif;font-size:20px;font-weight:500;line-height:28px;margin:0;margin-bottom:0;padding:0;text-align:left;word-wrap:normal">Xilinx Unveils Revolutionary Adaptable Computing Product Category</h1> <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word">&#xA0;</td></tr></tbody></table> </th><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th>              </tr></tbody></table> <table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"> <table class="spacer" style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><td height="24px" style="-moz-hyphens:auto;-webkit-hyphens:auto;Margin:0;border-collapse:collapse!important;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:24px;font-weight:400;hyphens:auto;line-height:24px;margin:0;mso-line-height-rule:exactly;padding:0;text-align:left;vertical-align:top;word-wrap:break-word">&#xA0;</td></tr></tbody></table><p><span class="xn-location">SAN JOSE, Calif.</span>, <span class="xn-chron">March 19, 2018</span> /PRNewswire/ --&nbsp;Xilinx, Inc. (NASDAQ: XLNX), the leader in adaptive and intelligent computing, today announced a new breakthrough product category called adaptive compute acceleration platform (ACAP) that goes far beyond the capabilities of an FPGA. An ACAP is a highly integrated multi-core heterogeneous compute platform that can be changed at the hardware level to adapt to the needs of a wide range of applications and workloads. An ACAP's adaptability, which can be done dynamically during operation, delivers levels of performance and performance per-watt that is unmatched by CPUs or GPUs.</p> 
   <p>An ACAP is ideally suited to accelerate a broad set of applications in the emerging era of big data and artificial intelligence. These include: video transcoding, database, data compression, search, AI inference, genomics, machine vision, computational storage and network acceleration. Software and hardware developers will be able to design ACAP-based products for end point, edge and cloud applications. The first ACAP product family, codenamed "Everest," will be developed in TSMC 7nm process technology and will tape out later this year. </p><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left"><center data-parsed="" style="min-width:510px;width:100%"><img src="https://mma.prnewswire.com/media/344708/xilinx_logo.jpg" alt="" align="center" class="float-center" style="-ms-interpolation-mode:bicubic;Margin:0 auto;clear:both;display:block;float:none;margin:0 auto;max-width:100%;outline:0;text-align:center;text-decoration:none;width:auto"></center></th><th class="expander" style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0!important;text-align:left;visibility:hidden;width:0"></th></tr></table></th></tr></tbody></table><table class="row content" style="background:#fff;border-collapse:collapse;border-spacing:0;display:table;padding:0;position:relative;text-align:left;vertical-align:top;width:100%"><tbody><tr style="padding:0;text-align:left;vertical-align:top"><th class="small-12 large-12 columns first last" style="Margin:0 auto;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0 auto;padding:0;padding-bottom:16px;padding-left:30px;padding-right:30px;text-align:left;width:570px"><table style="border-collapse:collapse;border-spacing:0;padding:0;text-align:left;vertical-align:top;width:100%"><tr style="padding:0;text-align:left;vertical-align:top"><th style="Margin:0;color:#0a0a0a;font-family:Montserrat,Arial,sans-serif;font-size:16px;font-weight:400;line-height:1.3;margin:0;padding:0;text-align:left">
   <p>"This is a major technology disruption for the industry and our most significant engineering accomplishment since the invention of the FPGA," says <span class="xn-person">Victor Peng</span>, president and CEO of Xilinx. "This revolutionary new architecture is part of a broader strategy that moves the company beyond FPGAs and supporting only hardware developers. The adoption of ACAP products in the data center, as well as in our broad markets, will accelerate the pervasive use of adaptive computing, making the intelligent, connected, and adaptable world a reality sooner."</p>
   <p><b>ACAP TECHNICAL DETAILS</b></p>
   <p>An ACAP has – at its core – a new generation of FPGA fabric with distributed memory and hardware-programmable DSP blocks, a multicore SoC, and one or more software programmable, yet hardware adaptable, compute engines, all connected through a network on chip (NoC). An ACAP also has highly integrated programmable I/O functionality, ranging from integrated hardware programmable memory controllers, advanced SerDes technology and leading edge RF-ADC/DACs, to integrated High Bandwidth Memory (HBM) depending on the device variant.</p>
   <p>Software developers will be able to target ACAP-based systems using tools like C/C++, OpenCL and Python. An ACAP can also be programmable at the RTL level using FPGA tools.</p>
   <p>"This is what the future of computing looks like," says <span class="xn-person">Patrick Moorhead</span>, founder, Moor Insights &amp; Strategy. "We are talking about the ability to do genomic sequencing in a matter of a couple of minutes, versus a couple of days. We are talking about data centers being able to program their servers to change workloads depending upon compute demands, like video transcoding during the day and then image recognition at night. This is significant."&nbsp; </p>
   <p>ACAP has been under development for four years at an accumulated R&amp;D investment of over <span class="xn-money">one billion dollars</span> (USD). There are currently more than 1,500 hardware and software engineers at Xilinx designing "ACAP and Everest."&nbsp; Software tools have been delivered to key customers. "Everest" will tape out in 2018 with customer shipments in 2019.</p>
   <p><b>"EVEREST" PERFORMANCE IMPROVEMENTS</b></p>
   <p>"Everest" is expected to achieve 20x performance improvement on deep neural networks compared to today's latest 16nm Virtex® VU9P FPGA. "Everest"-based 5G remote radio heads will have 4x the bandwidth versus the latest 16nm-based radios. A wide variety of applications across multiple markets like automotive; industrial, scientific and medical; aerospace and defense; test, measurement and emulation; audio/video and broadcast; and the consumer markets will see a significant performance increase and greater power efficiency.</p>
   <p>ACAP and the "Everest" project were announced today as part of Peng's vision for the future of Xilinx. <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasVs-2Bmnwd1D32ePmwz5mgwTB-2B-2BzUygoyx90EwGQ6yrh2PjcACTfFbUs0ypYWIiijBMrq-2FrnI2S8ygymFJv-2B0B4qAPHJY4cmkUiwDEFDbDOP-2BQaSsrd0Igy1Vyw52C4SaJVA-3D-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75-2BYrSQRNHyjOYENYRg82DRIp4lCJ-2FHuj5dt0E5caUldxAVCqpaeJ96JqrA4u3I-2Bpnxjama-2FaaAb29IcpBfvFsXoIjmRNtsEHGDzDWbmqWj39iImDIeK7yUfi6NgNdjwB6BfzoYpKwqCUuKvh8cCKMOK725pfsl7gVz8VcjHV-2BYA81z6apvYRm00wL-2BWI3hV3RFpHHaFJxh7pbQAdLJCyJl7Ua-2FhxrsKAbo937gLWqU9GNUQlFJX9zgkzExj1mtRD6-2FKH5QeIHpdLjYkKTtpUsrw-3D-3D" rel="nofollow" target="_blank">(see release)</a>. More information is available at <a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj0BhwUXO-2BoWPrBT9MneKb1A-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75-2BYrSQRNHyjOYENYRg82DRIp4lCJ-2FHuj5dt0E5caUldxAVCqpaeJ96JqrA4u3I-2Bpnxjama-2FaaAb29IcpBfvFsXoIjmRNtsEHGDzDWbmqWj39iImDIeK7yUfi6NgNdjwB68sL-2FxH-2Fkpm-2Fb2BpADnCHITdfntiPbj-2F-2B69AiVcljMUNAw1-2FIG5Tyu65EEzuH7pEIUBu84klAQWiThVaMbTNc-2Bth9Z8miasIiOnOXaBvycIAfsW2lTrjLOim0ketX04l-2FoJbAkAeSrZQtc99rysl1Eg-3D-3D" rel="nofollow" target="_blank">http://www.xilinx.com</a>.&nbsp; Follow us on Twitter: <a href="http://email.prnewswire.com/wf/click?upn=ZrWzD7t39xxz74k8LtTHCKvhZ1yFfTR9wwjNyX5dxXxd0s-2FTLA3WtAKlJ-2BmEgdzq_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75-2BYrSQRNHyjOYENYRg82DRIp4lCJ-2FHuj5dt0E5caUldxAVCqpaeJ96JqrA4u3I-2Bpnxjama-2FaaAb29IcpBfvFsXoIjmRNtsEHGDzDWbmqWj39iImDIeK7yUfi6NgNdjwB6P4cyXct38Bi0Ate-2BzWanlekGdtlxb8om-2FOUGoW2TyN58D0muh2sQVP4m5Nb0SJQRQv-2F7n5JL1njxo90iVwZ6WvsOXrlz55ltUtRI08-2B9geFx1dFAgcHpok6qX2KlgL4AbWyGyFhIyf5BHW-2Fs4DT6kQ-3D-3D" rel="nofollow" target="_blank"><b>@</b>XilinxInc</a>, Facebook: <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasQ-2FREeMBG2bqGXdCB4XzZ7AdNhlbFmnCBNuw9x8d0Zn4_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75-2BYrSQRNHyjOYENYRg82DRIp4lCJ-2FHuj5dt0E5caUldxAVCqpaeJ96JqrA4u3I-2Bpnxjama-2FaaAb29IcpBfvFsXoIjmRNtsEHGDzDWbmqWj39iImDIeK7yUfi6NgNdjwB6PRtgCOM0ZESKAeXNWHk-2Fzh237zTKKzHKnPWClLqN56-2FkeaAmcNvraq9AjOrhXzvnOJS55nIyojmU5BvSkFzYyOPl-2Fdk-2FDxTnId5Ir0taVU886FbgSc-2BpRGfAOiYM9JXhzHdbNvok6qCBqal3Cx02zQ-3D-3D" rel="nofollow" target="_blank">facebook.com/XilinxInc</a>, LinkedIn: <a href="http://email.prnewswire.com/wf/click?upn=7VDqtAz2AW-2FeY7XnbvsasaGI94tj-2F1l36fYlCraRYLHIjzVAsLMsw2nkOe8zR7Rg_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75-2BYrSQRNHyjOYENYRg82DRIp4lCJ-2FHuj5dt0E5caUldxAVCqpaeJ96JqrA4u3I-2Bpnxjama-2FaaAb29IcpBfvFsXoIjmRNtsEHGDzDWbmqWj39iImDIeK7yUfi6NgNdjwB6KsrMy8eBUZ1pZcFfICGZqLjux5KfAHJSjK9A-2BKJcWH-2F4uPhHuf7nMKlI4nCBFpKicqx1zaftRKjguOaI6kV7oflmIndko6SErQqVij9s-2B10Vf2qXNxSlSBTwyOyD8YTxZjD6FcT2Xr-2F1dZnJDP-2BOTA-3D-3D" rel="nofollow" target="_blank">linkedin.com/company/Xilinx</a>.</p>
   <p><b>About Xilinx</b></p>
   <p>Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies – from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP, designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future. For more information, visit <a href="http://email.prnewswire.com/wf/click?upn=TwIh0OIjG8BOSB67uKqqj0BhwUXO-2BoWPrBT9MneKb1A-3D_q1N77mbql2CxsoEfo2fFiZ6dnlev64IGUSa1KT1DDw1MuprZmQ6aap9NY9k0Le75-2BYrSQRNHyjOYENYRg82DRIp4lCJ-2FHuj5dt0E5caUldxAVCqpaeJ96JqrA4u3I-2Bpnxjama-2FaaAb29IcpBfvFsXoIjmRNtsEHGDzDWbmqWj39iImDIeK7yUfi6NgNdjwB66TFO0-2BHYC-2Bj4FFh-2FCpes3bQtrxxJPHEK54UJYwTEPO-2BFkIGUWSmbEBVJI6kAj8gKTf69GadPSX92573rZMZFaSIV6hFoL-2FMsg6bSD7ZXAq1h-2FsUPZs4LtDX2Ko0yNJS7yw4z4DeKQ2l1qT0uzopLyw-3D-3D" rel="nofollow" target="_blank">http://www.xilinx.com</a>. </p>
   <p>© Copyright 2018 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.</p>
   <p>#1808</p>
   <p>#AAB851</p>
   <p><b>Xilinx</b></p>
   <p><span class="xn-person">Tara Sims</span><br>415-713-5986</p>
   <p><a href="mailto:media@xilinx.com" rel="nofollow" target="_blank">media@xilinx.com</a></p>
   <p>&nbsp;</p> 
   
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